Archlinux, usb blaster setup

Quartus programmer fails immediately when downloading.

Add the following lines to the /etc/udev/rules.d/51-usbblaster.rules file.
# Intel FPGA Download Cable
SUBSYSTEM=="usb", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6001", MODE="0666"
SUBSYSTEM=="usb", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6002", MODE="0666"
SUBSYSTEM=="usb", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6003", MODE="0666" 

# Intel FPGA Download Cable II
SUBSYSTEM=="usb", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6010", MODE="0666"
SUBSYSTEM=="usb", ATTR{idVendor}=="09fb", ATTR{idProduct}=="6810", MODE="0666"



If the programmer takes a while to fail,  check the jtagd process, it may become a zombie process.
$ sudo killall -9 jtagd   # Kill jtagd, ...
$ sudo killall -9 jtagd   # ...and verify jtagd is indeed not running.
jtagd: no process found   # Good, verified.

If everything is ok,  run jtagconfig -d, you should see this

[uty@u bin]$ pwd
/home/uty/intelFPGA_lite/19.1/quartus/bin
[uty@u bin]$ jtagconfig -d
1) USB-Blaster [1-3]
   (JTAG Server Version 19.1.0 Build 670 09/22/2019 SJ Standard Edition)
  020F10DD   10CL006(Y|Z)/10CL010(Y|Z)/.. (IR=10)
    Design hash    FB22D0B4FE4AA5509233
    + Node 19104600  Nios II #0
    + Node 0C006E00  JTAG UART #0
    + Node 00086E00  (110:1) #0

  Captured DR after reset = (020F10DD) [32]
  Captured IR after reset = (155) [10]
  Captured Bypass after reset = (0) [1]
  Captured Bypass chain = (0) [1]
  JTAG clock speed 6 MHz