The latest is from 2014.09.22. Things change.
The minimum system only needs clk, nios process, on chip memory, and jtag art.
I use Quartus 19.1.
The difference is that the new Nios II processor module has two more ports, debug_reset_request and debug_mem_slave.
The debug_reset_request should connect to all other modules except clk_0.
This reset output signal appears when the JTAG Debug module is enabled. This signal is triggered by the JTAG debugger or nios2-download -r command. This signal must be connected to the reset input signal of the Nios II processor which allows the JTAG debugger to reset the processor. This signal can be connected to the reset input signal of other components when needed.
debug_mem_slave connects both data_master and instruction master.